School of Engineering and Digital Arts

VLSI/ASIC design. Neural Networks, Optical Sensor Systems and Applications, Image processing using VLSI.

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Room 1.23
Jennison Building
University of Kent
Canterbury
Kent
CT2 7NT

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Reconfigurable Architectures, FPGAs, Low-Power, Adiabatic Circuits, Logarithmic Signal Processing, Image Processing and Computer Vision, Embedded Systems,

Publications

View a full list in the Kent Academic Repository

Article:
Moser, Steve, Lee, Peter, Podoleanu, Adrian G.H.. 2015, An FPGA Architecture for Extracting Real-Time Zernike Coefficients from Measured Phase Gradients. Measurement Science Review
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Vandenbussche, Jean-Jacques, Peuteman, Joan, Lee, Peter. 2015, Multiplicative finite impulse response filters: implementations and applications using field programmable gate arrays. IET Signal Processing
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Chaudhary, Mandeep, Lee, Peter. 2015, An Improved Two-Step Binary Logarithmic Converter for FPGAs. IEEE Transactions on Circuits and Systems II: Express Briefs
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Gao, Lingjun, Yan, Yong, Carter, Robert M., Sun, Duo, Lee, Peter, Xu, Chuanlong. 2013, On-line particle sizing of pneumatically conveyed biomass particles using piezoelectric sensors. Fuel
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Chaudhary, Mandeep, Lee, Peter. 2013, Two-stage logarithmic converter with reduced memory requirements. IET Computers & Digital Techniques
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Vandenbussche, Jean-Jacques, Lee, Peter, Peuteman, Joan. 2013, On the coefficient quantization of Multiplicative FIR filters. Digital Signal Processing
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Carter, Robert M., Yan, Yong, Lee, Peter. 2006, On-Line Nonintrusive Measurement of Particle Size Distribution through Digital Imaging. IEEE Transactions on Instrumentation and Measurement
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Yan, Yong, Xu, Lijun, Lee, Peter. 2006, Mass Flow Measurement of Fine Particles in a Pneumatic Suspension using Electrostatic Sensing and Neural Network Techniques. IEEE Transactions on Instrumentation and Measurement
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Uzenkov, Oleg, Lee, Peter, Webb, David J.. 2006, An FPGA-Based Measurement System for a Fibre Bragg Grating (FBG) Strain Sensor. IEEE IMTC
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Batchelor, John C., El-Eraki, S.M., Lee, Peter, Langley, Richard J.. 2003, FM Signal Multipath Reduction using Multiplier-Less Adaptive Filters. Microwave and Optical Technology Letters
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McBader, Stephanie, Lee, Peter. 2003, Reducing Memory Bottlenecks in Embedded, Parallel Image Processors. IEE Electronics Letters
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McBader, Stephanie, Lee, Peter. 2003, Reducing Memory Bottlenecks in Digital Image Processors. IEE Electronics Letters
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Paschalakis, Stavros, Lee, Peter. 2000, Statistical pattern recognition using the Normalized Complex Moment Components vector. Joint International-Association-of-Pattern-Recognition International Workshops - SSPR 2000 and SPR 2000
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Rahman, Ahmad Fuad Rezaur, Fairhurst, Michael, Lee, Peter. 1998, Design considerations in the real-time implementation of multiple expert image classifiers within a modular and flexible multiple-platform design environment. Real-Time Imaging
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Lee, Peter, Sartori, Alvise. 1998, Modular leading one detector for logarithmic encoder. Electronics Letters
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Lee, Peter, Lazzizzera, I., Zorat, Alessandro, Sartori, Alvise, Tecchiolli, G.. 1997, Advances in the design of the TOTEM neurochip. 5th International Workshop on Software Engineering, Neural Nets, Genetic Algorithms, Expert Systems, Symbolic Algebra and Automatic Calculations in Physics Research (AIHENP 96)
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Lee, Peter, Simoni, Andrea, Sartori, Alvise, Torelli, Guido. 1995, A photosensor array for spectrophotometry. Eurosensors VIII
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Conference item:
Hopkins, Mark. B., Lee, Peter. 2015, High frequency amplifiers for piezoelectric sensors noise analysis and reduction techniques. 2015 IEEE International Instrumentation and Measurement Technology Conference (I2MTC),
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Motoc, Iulia, Sirlantzis, Konstantinos, Spurgeon, Sarah K., Lee, Peter. 2014, A Stable and Robust Walking Algorithm for the Humanoid Robot NAO based on the Zero Moment Point. CareTECH
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Motoc, Iulia, Sirlantzis, Konstantinos, Spurgeon, Sarah K., Lee, Peter. 2014, Zero Moment Point/Inverted Pendulum-Based Walking Algorithm for the NAO Robot. 2014 Fifth International Conference on Emerging Security Technologies (EST),
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Horne, Robert, Kelly, Stephen W., Lee, Peter. 2013, A Framework for Mouse Emulation that Uses a Minimally Invasive Tongue Palate Control Device utilizing Resistopalatography. Humascend 2013
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Lee, Peter, Adefila, Kehinde, Yan, Yong. 2012, An FPGA correlator for continuous real-time measurement of particulate flow. IEEE Instrumentation and Measurement Technology Conference (I2MTC), 2012 IEEE International
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Vandenbussche, Jean-Jacques, Lee, Peter, Peuterman, John. 2012, Linear Phase Approximation of Real and Complex Pole IIR Filters using MFIR Structures. 5th European Confernce on the Use of Modern Information and Communication Technologies
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Yemiscioglu, Gurtac, Lee, Peter. 2012, 16-Bit Clocked Adiabatic Logic (CAL) Leading One Detector for a Logarithmic Signal Processor. Ph.D. Research in Microelectronics and Electronics (PRIME), 2012 8th Conference
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Yemiscioglu, Gurtac, Lee, Peter. 2012, 16-Bit Clocked Adiabatic Logic (CAL) logarithmic signal processor. 55th International Midwest Symposium on Circuits and Systems (MWSCAS)
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Vandenbussche, Jean-Jacques, Lee, Peter, Peuteman, Joan. 2012, An FPGA based Digital Lock-In Amplifier Implemented using MFIR Resonators. Signal Processing, Pattern Recognition and Applications / 779: Computer Graphics and Imaging - 2012
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Nnolim, N., Lee, Peter. 2008, A Review and Evaluation of Image Contrast Enhancement Algorithms based on Statistical Measures. 10th IASTED International Conference on Signal and Image Processing
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Vandenbussche, Jean-Jacques, Lee, Peter, Peuteman, Joan. 2008, Analysis of Time and Frequency Domain Performance of MFIR Filters. ESA'08, 2008 International Conference on Embedded Systems and Applications
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Weston, James Lloyd, Lee, Peter. 2008, FPGA Implementation of Cellular Automata Spaces using a CAM Based Cellular Architecture. 3rd NASA/ESA Conference on Adaptive Hardware and Systems
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Nnolim, Uche, Lee, Peter. 2008, Homomorphic Filtering of Colour Images using a Spatial Filter Kernel in the HIS Colour Space. I1MTC2008 - IEEE International Instrumentation and Measurement Technology Conference
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Lee, Peter, Alexiadis, Evangelos. 2008, An Implementation of a Multiplierless Hough Transform on an FPGA Platform using Hybrid-Log Arithmetic. SPIE Conference on Real-Time Image Processing 2008
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Wisdom, Michael, Lee, Peter. 2007, Evaluation of a Hybrid-Log 2D Wavelet Image Transform. IEEE DSP2007 15th International Conference on Digital Signal Processing
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Litchfield, C., Lee, Peter, Langley, Richard J.. 2007, Logarithmic Codecs for Adaptive Beamforming in WCDMA Downlink Channels. 2007 IEEE International Symposium on Circuits and Systems
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Lee, Peter. 2007, A VLSI Implementation of a Digital Hybrid-LNS Neuron. International Symposium on Integrated Circuits
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Lee, Peter. 2007, An Estimation of Mismatch Error in IDCT Decoders Implemented with Hybrid-LNS Arithmetic. 15th European Signal Processing Conference (EUSIPCO 2007)
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Wisdom, Michael, Lee, Peter. 2007, An Efficient Implementation of a 2D DWT on FPGA. International Conference on Field Programmable Logic and Applications
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Lee, Peter, Costa, Eduardo P., McBader, Stephanie, Clementel, Luca, Sartori, Alvise. 2007, LogTOTEM: A Logarithmic Neural Processor and its Implementation on an FPGA Fabric. Neural Networks. International Joint Conference on
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Weston, J., Lee, Peter. 2007, Cellular Automata Based Binary Arithmetic for Use on Self Repairing, Fault Tolerant Hardware. NASA/ESA Conference on Adaptive Hardware and Systems
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Weston, James Lloyd, Lee, Peter. 2007, An Unbounded Parallel Binary Tree Adder for use on a Cellular Platform. IEEE Symposium on Artificial Life
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Litchfield, C., Langley, Richard J., Lee, Peter, Batchelor, John C.. 2005, Least Squares Adaptive Algorithms Suitable for Multiplierless LMMSE Detection in 3rd Generation Mobile Systems. IEEE International Symposium on Personal, Indoor, and Mobile Radio Communications
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Lee, Peter. 2005, An Evaluation of a Hybrid-Logarithmic Number System DCT/IDCT Algorithm. IEEE International Symposium on Circuits and Systems
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Litchfield, C., Lee, Peter, Langley, Richard J., Batchelor, John C.. 2005, The Use of Hybrid Logarithmic Arithmetic for Root Raized Cosine Matched Filters in WCDMA Downlink Receivers. IEEE Wireless Communications and Networking Conference
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McBader, Stephanie, Lee, Peter, Sartori, Alvise. 2004, The Impact of Modern FPGA Architectures on Neural Hardware: A Case Study of the TOTEM Neural Processor. Int. Joint Conf. on Neural Networks, Special Session on Dig. Imp. of Neural Nets - Invited Paper
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Paschalakis, Stavros, Lee, Peter. 2003, Double Precision Floating-Point Arithmetic on FPGAs. Proc. 2003 2nd International Conference on Filed Programmable Technology (FPT2003)
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McBader, Stephanie, Lee, Peter. 2003, Vision Systems-on-Chip: General Purpose Architectures and Limitations. ECCTD 2003
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McBader, Stephanie, Lee, Peter. 2002, A Programmable Image Signal Processing Architecture for Embedded Vision Systems. 14th IEEE International Conference on Digital Signal Processing, DSP 2002
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El-Eraki, S.M., Batchelor, John C., Lee, Peter, Langley, Richard J.. 2002, A Multiplier-Less Adaptive CMA Equalizer. London Communications Symposium
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Paschalakis, Stavros, Lee, Peter. 2000, Combined geometric transformation and illumination invariant object recognition in RGB color images. 15th International Conference on Pattern Recognition (ICPR-2000)
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Paschalakis, Stavros, Lee, Peter. 1999, Pattern recognition in grey level images using moment based invariant features. 7th IEE Conference on Image Processing and its Applications (IPA99)
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McBader, Stephanie, Lee, Peter. , A 3.23 GOPS Parallel Architecture for Digital Image Pre-Processing. IASTED International Conference on Signal Processing, Pattern Recognition and Applications Conference SPPRA 2002
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McBader, Stephanie, Lee, Peter, Pedegani, G., Sartori, Alvise. , SmartPupilla: A Complete Vision System-on-a-Chip. Proc. Advanced Concepts for Intelligent Vision Systems, ACIVS 2002
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Aseeri, Mohammed A., Sobhy, Mohammed, Lee, Peter. , Lorenz Chaotic Generator Using Field Programmable Gate Array (FPGA). 45th IEEE MWSCAS Conference
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Paschalakis, Stavros, Lee, Peter, Bober, M.. , An FPGA System for the High Speed Extraction, Normalization and Classification of Moment Descriptors. 13th International Conference on Field Programmable Logic and Applications (FPL 2003)
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Koller, N., O'Leary, P., Lee, Peter. , Comparison of CMOS and CCD Cameras for Laser Profiling. Electronic Imaging Science and Technology (IS & T SPIE)
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McBader, Stephanie, Clementel, Luca, Sartori, Alvise, Boni, Andrea, Lee, Peter. , SoftTOTEM: An FPGA Implementation of the TOTEM Parallel Processing. Proc. 12th Int. Conf. On Field Programmable Logic and Applications (Lecture Notes in Computer Science LNCS 2438)
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Hendawy, M., Lee, Peter. , Using Phase Sensitive Techniques to Improve the Resolution of Optical Position Sensitive Detectors. EUROSENSORS 17th European Conference on Solid-State Transducers
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Other:
Lee, Peter, Sartori, Alvise, Tecchiolli, Giampietro, Zorat, Alessandro. 2006, A parallel processor for neural networks. 1995 Symposium on VLSI Circuits
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School of Engineering and Digital Arts, Jennison Building, University of Kent, Canterbury, Kent, CT2 7NT

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Last Updated: 30/08/2017